Some MGTs are not available for the SX50T and the LX50T FPGAs; for this reason, some of the RSLs are not available with these FPGAs. The missing RSLs are represented by red crosses on the pictures.
The following pictures show the connectors location for RSL made of 4 RIO lanes for the SMT351T board.
Note: the 4 RIO lanes core is not available in the current release of Diamond.
Virtex5 SX50T and LX50T
Virtex5 SX95T and LX110T
The following pictures show the connectors location for RSL made of 1 RIO lane.
Note: there are restrictions in the 1 RIO lane RSL that can be used in the same FPGA. Only one every two RSL can be used at once thus allowing half of the 1 RIO lane RSLs to be used.
This is due to limitations imposed by the Xilinx core. Diamond issues an error when a conflict occurs.
Virtex5 SX50T and LX50T
Virtex5 SX95T and LX110T
