When a low-level handler is entered, interrupts are enabled (GIE=1), but the particular interrupt that invoked the handler is disabled: the corresponding bit in IER has been cleared.
The following registers are involved in interrupt handlers
Registers not mentioned here must be untouched by your handler.
a0 |
work register |
value may be changed |
|
a1 |
work register |
value may be changed |
|
a2 |
handler argument |
must be correct on entry to next handler |
|
a3 |
work register |
value may be changed |
|
a4 |
work register |
value may be changed |
|
a11 |
kernel pointer |
must not be altered |
|
b0 |
work register |
value may be changed |
|
b1 |
work register |
value may be changed |
|
b3 |
work register |
value may be changed |
|
b4 |
work register |
value may be changed |
|
b11 |
address of next ICB |
must be correct on entry to next handler |