wire statement = "WIRE", new identifier, transmitter, receiver,
{wire attribute};
transmitter = link spec;
receiver = link spec;
link spec = processor identifier, "[", link type, ":", constant, "]";
link type = identifier;
wire attribute = "NOBOOT";
The WIRE statement declares an explicit connection that you have made between link connectors of two processors. This usually involves an explicit cable, although on certain systems the actual connection may be made by an underlying carrier board, a backplane, or some other mechanism. Unless, exceptionally, you actually do want to provide a cable between the relevant external connectors, the WIRE statement should not be used to connect processors that are attached, either explicitly or implicitly: see ATTACH attribute.
Driver software (and sometimes firmware) needs to be added to processors before links can be used. A reference to a link in a WIRE statement is taken as a request for the configurer to ensure that the relevant driver module is loaded. If you do not reference a link in a WIRE statement (or CONNECT statement), you are unlikely to be able to use that link at all. Drivers are also loaded automatically for connections between attached processors.
Every processor in the network can control one or more types of link. Each link type has a unique name and provides a number of links, identified by integers from 0 upwards. The two ends of the wire are each defined by using a link spec construct made up from a processor identifier, the type of the link and a constant selector.
The position of a link spec, either transmitter or receiver, is used to initialize links implemented on hardware that needs to be set into a particular initial state: (unidirectional FastBus links, for example). Other than this, because each WIRE statement usually supports communication in both directions, the two link specs in a WIRE statement may often be interchanged without affecting the statement's meaning.
wire yellow_wire proc_one[somelink:2] proc_two[somelink:3]
The PROCESSOR and WIRE statements must correspond to the real hardware network on which the application is to be run. If this is not so, the application will probably fail to load and will certainly not run properly.
The two ends of the wire must be of compatible types. Refer to the installation section for a list of the available link types.
When you give a link spec, the configurer checks to see if the processor has the link you mention and then uses it. If there is no such link, the configurer checks any processor to which the given processor is attached, and repeats the procedure up the hierarchy until the link is found. You will receive an error message if the end of the chain of attachments is reached before the link is discovered. The configurer may decide to create new bitstreams if a path through an FPGA is needed and one is not available in the standard bitstream. Note that no new paths are created in implicit processors.
The following diagram shows how connectors can be accessed from three processors X, Y, and Z, where X has links of type DEV_C, Y has links of type DEV_B, and Z has links of type DEV_A:
As there can be several ways to reference the same link (for example in the picture above, Y[DEV_B:0] and Z[DEV_B:0]) you should be careful that you do not try to connect a link to itself, as in the following WIRE statement:
WIRE W9 Y[DEV_B:0] Z[DEV_B:0]
This would result in the configurer giving the error message 'link Z[DEV_B:0] has already been used'.
Connections between tasks placed on processors that are attached do not require WIRE statements explicitly joining the processors; such connections are created automatically and invisibly for you.