Adding tasks and devices to a clock domain
You can add tasks to a clock domain in the IDE by double clicking the task and selecting Advanced/Clock domain.
You can add devices to a clock domain in the IDE in two ways:
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In your configuration file, you can add tasks or devices to a clock domain by giving a CLOCK= qualifier to link specifiers and PLACE statements. In the following example, a 50MHz clock is derived from the default clock and this is used to clock the task test:
PROCESSOR fpga1 SMQ_LX160_FGPA device=1 ! an FPGA
PROCESSOR dsp1 SMQ_DSP device=1 root ATTACH=fpga1 ! a DSP
CLOCK slow processor=fpga1 source=DEFAULT output=50MHz
TASK test ins=1 outs=1
PLACE test fpga1 clock=slow
Creating a clock from a task
A task can generate a clk_out signal that you can use to create a clock domain. For example, this may be used to receive and process the data produced by an ADC. The task capturing the samples, the processing task, and the communication device all run using the clock of the ADC. The following diagram shows an example of such an application.
The task AdcCM generates a clock AdcClk that is used to capture the data in the FPGA. The task AdcDp captures the samples provided by the ADC using the clock AdcClk and sends them to the processing task. The results are sent to a link device that also uses the clock AdcClk to send the data out.
You declare the clock domain in the Diamond IDE as follows:
