1.

It first saves all of the registers used in interrupt handling in a save area reserved for that purpose. Only a small selection of registers is saved.

2.

The bit in IER corresponding to the interrupt is cleared.

3.

Interrupts are re-enabled by setting GIE=1.

4.

The kernel now loads the address of the first ICB into register b11 and calls the first handler with code equivalent to this:
 

ldw *+b11[1], b3  ; load address of handler to b3

ldw *+b11[2], a2  ; load handler’s argument to a2

ldw *+b11[0], b11 ; load address of next handler to b11

nop  2            ; wait for b3 to load

b    b3           ; call the handler

nop  5

5.

The handler executes and terminates by repeating the above sequence to enter the next handler.

6.

The final handler in the list has an ICB that takes control back to the kernel.

7.

The kernel restores the registers it saved earlier and either: