RTDEx

The RTDEx logic is a master of the OPB bus and gives access to the board's PCI bridge chip. You can perform PCI transfers by accessing the PCI logic via this point to point communication link.

The following signals should be added to your FPGA task to use the RTDEx:

rtdex_dreq_n                   : out std_logic_vector(1 downto 0);

rtdex_dreq_n_en_n              : out std_logic_vector(1 downto 0);

rtdex_en                       : in std_logic;

rtdex_be                       : in std_logic_vector(3 downto 0);

rtdex_we                       : in std_logic;

rtdex_re                       : in std_logic;

rtdex_din                      : in std_logic_vector(31 downto 0);

rtdex_dout                     : out std_logic_vector(31 downto 0);    

You should use the Lyrtech-provided core rtdex_io in your task to access the RTDEx functionality.

Note that the rtdex_io core needs to be connected to the EMIF interface of the OPB subsystem to function properly.