Diamond provides the link type McBSP for the Multichannel Buffered Sperial Ports and these correspond directly to the three ports available on C6000 DSPs.
PROCESSOR DSP1 SMQ_DSP DEVICE=1
PROCESSOR DSP3 SMQ_DSP DEVICE=3
WIRE ? root[McBSP:0] node[McBSP:0] ! Default on-board connection
The McBSP links use hardware that is not well-suited to inter-processor communication as there is no indication from a receiver that it is ready to accept data. A transmitter simply continues to send data and assumes the receiver is reading. If the receiver is ever not ready, data will be lost. Diamond works hard to prevent this but cannot stop users from explicitly causing delays. The most likely cause of trouble would be something that causes the receiving processor to disable interrupts for significant times. The TI compiler can generate code that does disable interrupts in an attempt to produce faster instruction sequences. If you take advantage of this option, you must ensure that the code in question cannot be executed while McBSP transfers are active. The standard 3L C command disables the option by giving the compiler option -mi=1.
Asynchronous accesses from a DSP to its FPGA can lock the processor for longer than the time the McBSP task to transmit a word. When this happens, the processor cannot respond fast enough to process one word before it is overwritten by the next. The only solution to this problem is for the Diamond driver to require acknowledgements for each and every word. This makes McBSP links work reliably but at the expense of more than halving the available bandwidth. This is a fundamental limitation of the C6000 devices.