Interrupt Processing Flow

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When an interrupt occurs, the hardware globally disables interrupts (clears GIE) then executes the corresponding Interrupt Service Fetch Packet (ISFP) from the kernel’s Interrupt Service Table (IST). This enters the kernel’s interrupt service routine which handles the interrupt as follows:

1.

It prepares for interrupt handling by:


disabling the interrupt by clearing the corresponding bit in the Interrupt Enable Register (IER).

pushing two words on the current thread’s stack to free up work registers.

saving more work registers and the Interrupt Return Pointer (IRP) in an Interrupt Control Block (ICB). There are 16 of these, one for each CPU interrupt.

popping the two words previously pushed onto the interrupted thread’s stack.

globally re-enabling interrupts (setting GIE), allowing for nested interrupt processing.

2.

It then invokes each handler function from a chain of handlers associated with the interrupt. Low-level (kernel) handlers are called directly and run with interrupts enabled (to permit nested interrupts), but when calling a high-level handler the kernel:


Saves the stack pointer (register B15) then points it at the top of the handler stack.

Globally disables interrupts (clears GIE).

Sets up IRP so that when the user handler returns, processing of the chain resumes.

Enters the handler, which returns by branching to IRP; this globally re-enables interrupts.

Restores the saved stack pointer.

3.

After all handlers have been called, control returns to the kernel which:

globally disables interrupts (clears GIE).

re-enables the active interrupt by setting the corresponding bit in the IER.

restores the previously saved IRP from the ICB, in case there were any nested interrupts.

branches to IRP, which globally re-enables interrupts and resumes execution of the interrupted thread.