A Design Example

The following example shows the VHDL source code of a simple task. It demonstrates data transfer on the channels and shows how the ready signal is handled.

The task is an incrementer; the value incoming from input channel 0 is incremented and sent to output channel 0.

We must create three text files:

To use this task, we simply declare it with the name addone.  The configurer will then automatically look for the file addone.fcd. Itf your application needs multiple copies of the task, or you wish to give the task a name that differs from the .FCD file, you will need to supply a FILE= qualifier to the task statement.